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ChenJianyunp / DS1302_verilog

Repository from Github https://github.comChenJianyunp/DS1302_verilogRepository from Github https://github.comChenJianyunp/DS1302_verilog

ds1302led-displayfpga

This is a Verilog project to initialize the ds1302 clock chip and read the time data from the chip. The result of the chip will be shown on an 8 bit LED Common anode digital tube.The picture of running is in picture.doc.

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ds1302led-displayfpga

Languages

Language:Verilog 86.7%Language:SystemVerilog 9.5%Language:Stata 1.6%Language:Scheme 1.1%Language:Mathematica 0.9%Language:Standard ML 0.1%