CedricRev / simple-calculator-verilog

An 8-bit calculator that can multiply, add and subtract. Created and simulated in Quartus Prime and physically implemented in DEC-SOC1 FPGA.

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simple-calculator-verilog

An 8-bit calculator that can multiply, add and subtract. Created and simulated in Quartus Prime and physically implemented in DEC-SOC1 FPGA.

Subject: Hardware Description Language Language: Verilog


Code Previews and Waveforms

Quartus Prime Expected Outputs and Waveform enter image description here Visual Implementation in Quartus to FPGA enter image description here

DEC-SoC1 FPGA

Sample Implementation in FPGA enter image description here

About

An 8-bit calculator that can multiply, add and subtract. Created and simulated in Quartus Prime and physically implemented in DEC-SOC1 FPGA.

License:MIT License


Languages

Language:Verilog 100.0%