CSY-tvgo / Learn-Verilog-with-YADAN-Board

Some examples of using Verilog to implement some simple digital designs on YADAN Board. // 用 Verilog 在 YADAN 开发板上实现一些简单数字系统的案例。

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

Learn-Verilog-with-YADAN-Board

本代码仓库展示了《在 YADAN Board 上入门 Verilog》系列教程的的配套代码,点击下方链接了解详情:

This repository demonstrates some sample code for the series of tutorials Learn Verilog with YADAN Board. Visit the link below for more information:

About YADAN

https://github.com/CSY-tvgo/YADAN-Docs

About

Some examples of using Verilog to implement some simple digital designs on YADAN Board. // 用 Verilog 在 YADAN 开发板上实现一些简单数字系统的案例。


Languages

Language:Verilog 88.9%Language:Perl 6.9%Language:Python 4.2%