wolfdroid / Integer_Calculator

Simple RTL model for Interger Numbers Calculation using RAM and 7 Segment Display.

Integer Calculator

Simple RTL Design for Integer Number Calculation in Altera Family and other compatible FPGAs using VHDL.

Guide

1. Make new Project in Quartus Prime Software.
2. Generate 32x8 bits single-port RAM.
3. Create 7 Segment Entity for Output.
4. Create each Arithmatical operation entity ( this project will only covers addition, substraction, division, multiplication, factorial, square, volume, and square root operation ).
5. Combine All Entity into one main Entity.

Source Code

• Main Entity
• Seven Segment Module
• RAM Module
• Additon Function
• Substraction Function
• Multiplication Function
• Division Function
• Factorial Function
• Square Function
• Volume Function
• Root Square Function

License

📷 Documentation

For documentation, check in the documentation folder that are provided in this repository.

For more information about tools that being used in this project