wisen

cacti

An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model

raytracing.github.io

Main Web Site (Online Books)

opengles4android

OpenGLES 3.0从零开始，绘制点、线、三角形、立方体，相机实时预览等等实践学习

Main

Main page

riscy-OOO

RiscyOO: RISC-V Out-of-Order Processor

ai-edu

AI education materials for Chinese students, teachers and IT professionals.

rsd

RSD: RISC-V Out-of-Order Superscalar Processor

biriscv

32-bit Superscalar RISC-V CPU

InteractiveHtmlBom

Interactive HTML BOM generation plugin for KiCad, EasyEDA, Eagle, Fusion360 and Allegro PCB designer

jchdl

Jianchang Constructed Hardware Description Library

ESYSim

RISCV-Accelerator

SOC

NCHU 2017 SOC course (吳崇賓)

DSP

NCHU 2017 VLSI & DSP course (黃穎聰)

tsea26

Embedded Dsp processor

interpolation

Digital Interpolation Techniques Applied to Digital Signal Processing

DSP

CompArch Final Project: DSP Architecture

DSP-RTL-Lib

RTL Verilog library for various DSP modules

dspfilters

A collection of demonstration digital filters

ThinkDSP

Think DSP: Digital Signal Processing in Python, by Allen B. Downey.

raven-picorv32

Silicon-validated SoC implementation of the PicoSoc/PicoRV32

download

Lantern官方版本下载 蓝灯 翻墙 代理 科学上网 外网 加速器 梯子 路由 proxy vpn circumvention gfw

mptcp_net-next

Development version of the Upstream MultiPath TCP Linux kernel 🐧

Dummy-Robot

我的超迷你机械臂机器人项目。

digilent-xdc

A collection of Master XDC files for Digilent FPGA and Zynq boards.

FPGAandImage

image processing based FPGA

zju-icicles

浙江大学课程攻略共享计划

spector

Spector: An OpenCL FPGA Benchmark Suite

riffa

The RIFFA development repository

toygpu

A simple GPU on a TinyFPGA BX