UC Berkeley Architecture Research

Baremetal-NN

A tool for converting PyTorch models into raw C codes that can be executed standalone in a baremetal runtime on research chips.

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

gemmini

Berkeley's Spatial Array Generator

radiance

Rocket Chip Generator

shuttle

A Rocket-based RISC-V superscalar in-order core

rerocc

hammer

Hammer: Highly Agile Masks Made Effortlessly from RTL

RISC-V-GNU-Toolchain-Prebuilt

Prebuilt RISC-V GCC Toolchains for Linux

testchipip

RoSE

A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robotic system.

rocket-dsp-utils

Tools for integrating DspTools components into a rocket-chip

riscv-sodor

educational microarchitectures for risc-v isa

ibex-wrapper

Wrapper for lowRISC Ibex

cva6-wrapper

Wrapper for ETH Ariane Core

constellation

A Chisel RTL generator for network-on-chip interconnects

berkeley-hardfloat

chipyard-cs152-sp24

Baremetal-IDE

A submodule of Chipyard https://github.com/ucb-bar/chipyard

libgemmini

Gemmini extensions for Spike

riscv-mini

Simple RISC-V 3-stage Pipeline in Chisel

chiseltest

The batteries-included testing and formal verification library for Chisel-based RTL designs.

riscv-tools-feedstock

riskybear-firmware

iris-event-utils

riskybear-mechanical

riskybear-PCB

Accelerated-TinyMPC

Model-predictive control for microcontrollers (fork mapping tinyMPC to gemmini or other HW accelerators)

mempress

gemmini-rocc-tests

Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator

spike-devices

Collection of device models for spike