EDA@TUM

muriscv-nn

muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.

utvm_staticrt_codegen

This project contains a code generator that produces static C NN inference deployment code targeting tiny micro-controllers (TinyML) as replacement for other µTVM runtimes. This tools generates a runtime, which statically executes the compiled model. This reduces the overhead in terms of code size and execution time compared to having a dynamic on-device runtime.

etiss

Extendable Translating Instruction Set Simulator

mlonmcu

Tool for the deployment and analysis of TinyML applications on TFLM and MicroTVM backends

vrtlmod

vRTLmod modifies Verilator generated RTL simulation code for faul-injection purposes. It transforms source code with the help of LLVM/Clang-Tools and generates a fault injection API.

M2-ISA-R

CoreDSL2 Parser with backend to generate simulation code for the ETISS instruction set simulator

compas-ft-riscv

repo to house various LLVM based SIHFT passes for RISCV 32/64 soft error resilience

etiss-sc

SystemC/TLM2.0 productivity library wrapping the Extendable Instruction Set Simulator ETISS as a tlm cpu core.

TVM-UMA

moiopt

etiss_riscv_examples

micro-kws

Complete flow for keyword spotting on microcontrollers. From data collection to data preparation to training and deployment.

mlonmcu-models

TinyML model zoo primarily used by the MLonMCU python package

mlonmcu-sw

Target software library (MLIF, Machine Learning Interface) used by the MLonMCU python package

RISCV_ISA_CoreDSL

CoreDSL descriptions of the RISC-V ISA

softvector

Vector arithmetic library targeting simulation of Vector Processing Units (VPUs) for various targets, e.g., ETISS.

tvm

Open deep learning compiler stack for cpu, gpu and specialized accelerators

CoreV_ISA_CoreDSL

CoreDSL descriptions of the Core-V ISA Extension (https://cv32e40p.readthedocs.io/en/latest/instruction_set_extensions.html)

etiss-accelerator-plugins

etiss_arch_riscv

RISC-V architecture models for ETISS

etiss_riscv_tests

extensible-compiler

MiBench2

MiBench ported for IoT devices

tflite-micro

TensorFlow Lite for Microcontrollers

tflite-pack

Packing Utils for TFLite Models

tum-ei-eda.github.io

tum-speech-recording

TUM Speech Recording is a small web application that collects short snippets of speech. It's designed to help gather open speech data sets to train machine learning systems.

tvm-workshop

Contains files for TVM-Workshops offered by the chair.

tvm_extensions

Collection of Python scripts wrapping around the TVM framework.

VPV-Peripherals

Library of example SystemC/TLM peripherals for various SoCs based on the SCS library