EDA@TUM

muriscv-nn

muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.

mlonmcu

Tool for the deployment and analysis of TinyML applications on TFLM and MicroTVM backends

etiss

Extendable Translating Instruction Set Simulator

seal5

Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization

vrtlmod

vRTLmod modifies Verilator generated RTL simulation code for faul-injection purposes. It transforms source code with the help of LLVM/Clang-Tools and generates a fault injection API.

M2-ISA-R

CoreDSL2 Parser with backend to generate simulation code for the ETISS instruction set simulator

micro-kws

Complete flow for keyword spotting on microcontrollers. From data collection to data preparation to training and deployment.

softvector

Vector arithmetic library targeting simulation of Vector Processing Units (VPUs) for various targets, e.g., ETISS.

TVM-UMA

etiss_riscv_examples

Trace-Generator

Python tool to generate monitors (and printers) for ETISS based on json description

M2-ISA-R-Perf

mlonmcu-models

TinyML model zoo primarily used by the MLonMCU python package

mlonmcu-sw

Target software library (MLIF, Machine Learning Interface) used by the MLonMCU python package

RISCV_ISA_CoreDSL

CoreDSL descriptions of the RISC-V ISA

SoftwareEval-Backends

SoftwareEvalLib

tvm

Open deep learning compiler stack for cpu, gpu and specialized accelerators

CoreV_ISA_CoreDSL

CoreDSL descriptions of the Core-V ISA Extension (https://cv32e40p.readthedocs.io/en/latest/instruction_set_extensions.html)

etiss-accelerator-plugins

etiss-perf-sim

ETISS-based performance simulator

etiss_arch_riscv

RISC-V architecture models for ETISS

etiss_riscv_examples_s4e

etiss_riscv_test_env

CI/CD Scripts for Evaluating the End-to-End "CoreDSL -> M2-ISA-R -> ETISS -> Test" Flow

etiss_riscv_tests

PerformanceSimulation_workspace

Example workspace for software performance simulation with ETISS-based performance simulator

riscv-coredsl-extensions

riscv-tests

seminar_generator

Excel generator for the student seminars (GradingSheets, Agenda, GradingReport)

tflite-pack

Packing Utils for TFLite Models