tum-ei-eda / M2-ISA-R

CoreDSL2 Parser with backend to generate simulation code for the ETISS instruction set simulator

https://tum-ei-eda.github.io/M2-ISA-R/

Left-hand indexing not supported

PhilippvK opened this issue 2 years ago · comments

Philipp van Kempen commented 2 years ago

The following code does not work with the CoreDSL2 frontend and the ETISS backend:

VXSAT_CSS[0] = 0b1;

As a workaround VXSAT_CSR = VXSAT_CSR | 0b1; works just fine.

Philipp van Kempen commented a year ago

Fixed on https://github.com/tum-ei-eda/M2-ISA-R/tree/feature_lhs_indexed_writes