formal-verification-for-designers

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RPTU-EIS / SecureBOOM
Formally proven secure design of the RISC-V core BOOM (Berkeley Out-of-Order Machine) w.r.t. transient execution attacks (e.g., Meltdown and Spectre)
design-methods formal-verification-for-designers hardware hardware-security meltdown security spectre
Language:Verilog 4

RPTU-EIS / SecureBOOM