boolean-circuit-minimization

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NYU-MLDA / ABC-RL
This is work-in-progress (WIP) refactored implementation of "Retreival-guided Reinforcement Learning for Boolean Circuit Minimization" work published in ICLR 2024.
boolean-optimization deep-learning electronic-design electronic-design-automation iclr2024 logic-synthesis mcts mcts-agents reinforcement-learning abc-rl boolean-circuit-minimization ml-for-chip-design ml-for-logic-synthesis retrieval-guided-rl
Language:Verilog 5