Wu Chenzhi's repositories
Learn-Kubernetes
kubernetes-demo
LoL-automation
League of Legends Client automation. Automatically accept Matches, pick Champions, bann Champions, choose Summoner and Rune.
ADS129x-tools
Tools for the TI ADS129x analog-digital converter chips (ADS1299, ADS1298, ADS1294, ADS1296)
ARM9-compatible-soft-CPU-core
This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your FPGA design as one submodule, if you master the interface of this .v file. This IP core is very compact. It is one .v file and has only less 1800 lines.
atom-python-linters
Atom package which lint python code with (flake8, mypy, pydocstyle, pylint)
cml
♾️ CML - Continuous Machine Learning | CI/CD for ML
co
計算機結構 -- 從 nand2tetris 入門
dart
A Dart plugin for Atom.
Glimpse
Fork of the GNU Image Manipulation Program 2.10.18
HowHow-parser
HowHow 影片處理器，協助分割每個發音
HowHow-web
HowHow 發聲器
L-ink_Card
Smart NFC & ink-Display Card
pyutilib
A collection of general Python utilities, including logging and file IO, subprocess management, plugin systems, and workflow management.
ray-optics
Simulate reflection and refraction of light.
RISC-V-Single-Cycle-CPU
A RISC-V 32bit single-cycle CPU written in Logisim
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
rv32m-multiplier-and-divider
a multiplier÷r verilog RTL file for RV32M instructions
SuperScalar-RISCV-CPU
SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.