Wu Chenzhi's starred repositories
e200_opensource
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
image-to-latex
Convert images of LaTex math equations into LaTex code.
e203_hbirdv2
The Ultra-Low Power RISC-V Core
wavedrom.github.io
Digital timing diagram editor
FPGA-USB-Device
An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器,可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备,只需要3个FPGA普通IO,而不需要额外的接口芯片。
BSV_Tutorial_cn
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。
arachne-pnr
Place and route tool for FPGAs
prjtrellis
Documenting the Lattice ECP5 bit-stream format.
hbird-e-sdk
Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/
FPGA-SATA-HBA
A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。
Verilog-FixedPoint
A Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version. 一个Verilog定点数库,提供算术运算、与浮点数的互相转换,包含单周期和流水线两种实现。
truenas-csp
TrueNAS Container Storage Provider for HPE CSI Driver for Kubernetes
pint_iverilog
Project PLS is developed based on icarus iverilog and will compile verilog into a much faster optimized model.
tai5-uan5_gian5-gi2_tsu1-liau7-khoo3
臺灣言語資料庫(deprecated)
pandoc_static_katex
A pandoc filter to process math with katex