Tianrui Wei's repositories
ariane-sdk
Ariane SDK containing RISC-V tools and Buildroot
chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
cocotb
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
bitwise
Terminal based bit manipulator in ncurses
chisel3
Chisel 3: A Modern Hardware Design Language
cocotb-test
Unit testing for cocotb
corescore
CoreScore
cpython
The Python programming language
dma_ip_drivers
Xilinx QDMA IP Drivers
FireMarshal
Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.
firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
FLORA
A partial reconfiguration floorplanner for Xilinx FPGAs.
junest
The lightweight Arch Linux based distro that runs, without root privileges, upon any Linux distro
linux
Linux kernel source tree
microwatt
A tiny Open POWER ISA softcore written in VHDL 2008
OmnixtendEndpoint
Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.
riscv-boom
SonicBOOM: The Berkeley Out-of-Order Machine
riscv-isa-sim
Spike, a RISC-V ISA Simulator
rocket-chip
Rocket Chip Generator
rocket-chip-blocks
RTL blocks compatible with the Rocket Chip Generator
staged-recipes
A place to submit conda recipes before they become fully fledged conda-forge feedstocks
verilog-ext
Verilog Extensions for Emacs
VossII
The source code to the Voss II Hardware Verification Suite
yosys
Yosys Open SYnthesis Suite