thejefflarson / little-cpu

Little cpu in verilog.

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Little CPU
==========

Little CPU is an implementation of the RISCV 32 base ISA (IM) in verilog.

You can run a simple test suite by installing the latest development version of icarus-verilog.
On OSX, you can install it using brew, and then the suite is just a make away:

  brew install icarus-verilog --HEAD
  make test

It is formally verified with: https://github.com/SymbioticEDA/riscv-formal

To run the formal test suite install SymbiYosys by following:
https://symbiyosys.readthedocs.io/en/latest/quickstart.html#installing

And then run:

  cd checks
  make
  make complete

I'm unreasonably proud and excited by this project, it was made with love, and I hope that it is a
good read. There's much more to come!

About

Little cpu in verilog.

License:MIT License


Languages

Language:Verilog 64.3%Language:Assembly 25.8%Language:C 4.1%Language:Python 3.7%Language:SystemVerilog 1.2%Language:Makefile 0.6%Language:C++ 0.1%Language:Shell 0.1%Language:Emacs Lisp 0.0%