taneroksuz

fpu

IEEE 754 single and double precision floating point library in systemverilog and vhdl

fpu-sp

IEEE 754 single precision floating point library in systemverilog and vhdl

cpu-medium

6-stage in-order dual-issue superscalar risc-v cpu with floating point unit

mult-tree

Wallace and Dadda tree multiplier generator in vhdl and verilog

aes

Hardware and software implementation of AES algorithm

cpu-small

2-stage in-order scalar risc-v cpu

sha

Hardware and Software Implementation of SHA Algorithm

cpu-benchmark

lyap

Block variants of Hammarling's method for solving generalized Lyapunov equations