For more information and updates: http://alexforencich.com/wiki/en/verilog/cam/start
GitHub repository: https://github.com/alexforencich/verilog-cam
FPGA-independent content addressable memory module.
Verilog Content Addressable Memory Module
For more information and updates: http://alexforencich.com/wiki/en/verilog/cam/start
GitHub repository: https://github.com/alexforencich/verilog-cam
FPGA-independent content addressable memory module.
Verilog Content Addressable Memory Module
MIT License