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tanbour / DDR2_Controller

DDR2 memory controller written in Verilog

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I know I need a better description. It shall arrive once I have more time to spend on projects which do not need any time spent on them.

Enjoy!

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DDR2 memory controller written in Verilog

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Language:Verilog 86.8%Language:SystemVerilog 8.5%Language:Makefile 4.2%Language:Coq 0.4%Language:Tcl 0.1%