Sumeet Kumar Sahoo's starred repositories
awesome-github-profile-readme
😎 A curated list of awesome GitHub Profile which updates in real time
educative.io_courses
this is downloadings of all educative.io free student subscription courses as pdf from GitHub student pack
InterviewBit
Collection of Abhishek Agrawal's gists solutions for problems on https://www.interviewbit.com
Interview-Bit
Solutions to problems on Interview Bit
learnopencv
Learn OpenCV : C++ and Python Examples
udacity-Intro-to-Machine-Learning
My solutions to quizzes, exercises, and projects in the Udacity Intro to Machine Learning course
ML_SageMaker_Studies
Case studies, examples, and exercises for learning to deploy ML models using AWS SageMaker.
8bit_MicroComputer_Verilog
This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a breadboard, it has the functionalities of his computer and modelled using Verilog HDL. This was developed for the Mini Project in Digital Systems course in my 3rd semester at IIT Palakkad.
Interrupt_Controller
An 8 input interrupt controller written in Verilog.
Building-A-Processor---Project
Design of a simulated 8-bit single-cycle processor using Verilog HDL, which includes an ALU, a register file and other control logic
FPGA_Verilog_Ballot_Box-TP2-ISL-UFV
Hardware description of a complete Ballot Box made in Verilog with implementation in FPGA-Altera-DE-2-155, made in Verilog with Quartus Prime in discipline ISL for computer science graduation.
Voice-Based-Motor-Control
A verilog HDL based project to control a servomotor with voice commands from an android phone.
8bit_MicroComputer_Verilog
This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a breadboard, it has the functionalities of his computer and modelled using Verilog HDL. This project was developed as a Mini Project in Digital Systems course in my 3rd semester at IIT Palakkad.
Embedded_Logic_and_Design
This repository contains all labs done as a part of the Embedded Logic and Design course.
minispartan6-audio
miniSpartan6+ (Spartan6) FPGA based MP3 Player
Image-Processing
Image Processing Toolbox in Verilog using Basys3 FPGA
MIPS-Processor
5-stage pipelined 32-bit MIPS microprocessor in Verilog
Computer-Organization-and-Architecture-LAB
Solution to COA LAB Assgn, IIT Kharagpur
coding-interview-university
A complete computer science study plan to become a software engineer.
datasciencecoursera
Data Science Repo and blog for John Hopkins Coursera Courses. Please let me know if you have any questions.
data-analyst
Content for Udacity's Data Analyst curriculum
Hackerrank-Solutions
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