Sanket Shankar Kulkarni's repositories
Array-Multiplier
Multiplier is one of the most important arithmetic unit in Microprocessors and DSPs and also a major source of power dissipation. Reducing the power dissipation of multipliers is a key to satisfy the overall power budget of various digital circuits and systems. The project elaborates the steps required to design array multiplier. The fundamental units to design a multiplier are adders. The variants of adders used in this project are Carry Save Adder(CSA) and Carry Propagate Adder(CPA). The main objective of our work is to calculate the average power, delay and PDP of 4x4 multipliers. The design of Half adder and Full adder for low power is obtained and the low power units are implemented on the array multiplier and the results are analyzed for better performance. The designs are done using Mentor Graphics tool and are simulated using H-SPICE
Real_time_temperature_and_humidity_monitoring_system
This is an IOT based monitoring system which gives real time data via sms depending on the data obtained the front end of the project can be controlled using mobile device which is connected through wifi module.
Count_down_timer--VHDL--FPGA--Altera-DE2
The three seven segment display counter down timer which can be counted down from any time between 9:59 minutes. The VHDL program is generic which can be modified to increase hours and minutes with very less adjustments.
Jackpot-Game-VHDL-Altera-De2-FPGA
The project provides information on how to use vhdl programming language on altera de2 board for buliding a fully functional jackpot game. The jack pot game uses switches push buttons, LCD and Importantly Seven segment display. The main concepts used in counters which are triggered at different frequency.
PNSequenceMultiplier
PN SequenceMultiplier gives the result of how nth-order PN sequence can be used to multiply two n/2-bit numbers to n-bit accuracy.Multiplier is one of the most important arithmetic unit in Microprocessors and DSPs and also a major source of power dissipation. Reducing the power dissipation of multipliers is a key to satisfy the overall power budget of various digital circuits and systems. Pseudo noise (PN) sequences are sequences of maximum period generated by a linear recurrence. PN sequences have many useful properties and have been used in a wide range of applications. The designs are done using Mentor Graphics tool, Model Sim, Mentor Leonardo, Synopsys Primetime.