A Mandelbrot set explorer implemented on an FPGA
... in development ...
A Mandelbrot set engine running on a Terasic DE10-nano (MiSTer) FPGA board. Currently, only a CPU controlled slideshow in 800x600 resolution is implemented, but most of the parts are already there.
Read more about it here: https://somuch.guru/category/mandelbrot/
Create a proper MiSTer core with ability to be controlled (moved around, zoomed, etc) with the keyboard / joypad ...
- 256 iterations / pixel
- 54bit fixed-point precision
- 1.8G multiplications / sec
- text overlay
- OR1200 control CPU
- adjustable output resolution
- 32bit color output (VGA / HDMI)
A video of the core running can be seen on Youtube.
more runtime configurability; calculation engine extended from 1 to 8 parallel modules; CPU firmware for a slideshow of interesting points around the Mandelbrot set
mandelbrot engine moved to separate (faster) clock; added control cpu; cpu can do basic slideshow
Mandelbrot engine working; single image generated on video output
basic FPGA scaffolding; video pipe working
added some interesting Mandelbrot set points
algorithm implementation with double type in C