riscv / riscv-plic-spec

PLIC Specification

https://jira.riscv.org/browse/RVG-59

riscv/riscv-plic-spec Issues

target (hart context) accesses claim/complete register
Updated 2 months ago
include interrupt trigger configuration registers in the memory map
Updated a year ago1
Reserved address access behavior undefined
Updated a year ago
Figure 3 can't match with the description in text
Updated a year ago
Why does the PLIC not support interrupt masking?
Updated 2 years ago4
Missing ligatures in PDF
Updated 2 years ago2
PLIC/CLINT type identification like: MISA
Updated 2 years ago
Ambiguity in handling deferred IRQs
Closed 2 years ago2
Error in Section 6 "Interrupt Enables"
Closed 2 years ago1
[Question] PLIC priorities and interrupt selection
Updated 3 years ago1
PLIC figure 2 clarifications
Updated 3 years ago1
Number of priorities
Closed 3 years ago8
Questions regarding gateways
Closed 3 years ago11
Memory map
Closed 3 years ago8
PDF/HTML of PLIC specification?
Closed 3 years ago1
Unclear language in interrupt completion section
Closed 3 years ago3
The image links in the docs are broken
Closed 3 years ago
Define context
Closed 3 years ago8
Wrong offset in memory map
Closed 3 years ago1
Missing LICENSE file
Closed 3 years ago1