riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.

https://jira.riscv.org/browse/RVG-148

riscv/riscv-cheri Issues

Define capability endianness
Closed 3 months ago4
prefer AUIPC over CSRR for debug pcc access
Updated 3 months ago7
Alignment requirements of CLC and CSC instructions
Updated 4 months ago11
CSRRSCI, CSRRSI don't have rs1
Closed 4 months ago
Forward compatibility of CANDPERM
Updated 4 months ago3
PTE-gated faults incorrectly said to depend on PCC?
Closed 4 months ago1
Checking whether PCC is sealed
Closed 4 months ago3
CHERI fault mcause value needs to be reassigned
Closed 4 months ago1
Behaviour of JVTC in legacy mode
Updated 4 months ago3
Renaming ASR permission
Updated 4 months ago2
Remove duplicate mnemonics
Closed 4 months ago14
Accessing CSRs without ASR permission
Updated 4 months ago5
No way to achieve `CSRR` on a capability
Closed 4 months ago20
the auipcc representability challenge
Updated 4 months ago8
Reset values of capability CSRs
Closed 4 months ago21
Canonical tag clearing pseudo
Closed 4 months ago4
Require X permission for CSEAL
Updated 4 months ago3
CSeal does not clear tag if the capability is already sealed
Closed 4 months ago7
Disabling zcheri_legacy features is ambiguous
Updated 4 months ago2
bug in assembly format on SC.C instruction
Closed 4 months ago1
DDC / DDDC should be address registers, so don't need to be full width in RV64
Closed 4 months ago
Use software-check exception?
Updated 4 months ago7
LC with rd=0
Closed 4 months ago2
Cbuildcap and ctestsubset and the use of DDC
Closed 4 months ago8
Should the main branch be deployed to GitHub pages on each push?
Closed 4 months ago3
Debug GPR access
Updated 4 months ago10
Tag memory PMA would be useful
Closed 4 months ago4
Exception policy for misaligned LC/SC is odd
Closed 4 months ago3
Define behaviour for reserved RV32 permission encoding
Closed 4 months ago4
pcc metadata after cm.j(al)t
Closed 4 months ago8
M/S-mode ambient authority other than "system registers"
Updated 4 months ago2
Save encoding space by using address LSB as mode bit
Updated 4 months ago4
Remove XLENMAX
Updated 4 months ago4
Increase type space by splitting on X permission
Updated 4 months ago2
Save encoding space by putting ASR (and other mode switches) in type
Updated 4 months ago2
Version in GitHub actions generated PDF wrong
Closed 4 months ago
Makefile VERSION does not match Git tag
Closed 4 months ago2
M bit sense should be inverted
Updated 4 months ago4
Use named citations
Updated 4 months ago9
CSETMODE is probably dispensible
Updated 4 months ago8
XLEN-bit results of CSR instructions must be sign extended to XLENMAX
Closed 4 months ago3
Simplifying WARL address CSR writes
Updated 4 months ago6
constructing capabilities in debug mode
Updated 4 months ago1
Corner cases in bounds checking
Updated 4 months ago3
Proposal to simplify (and fix) Zcheri_legacy
Updated 4 months ago
Document conflicts over floating point encodings
Closed 4 months ago2
Permission encoding order mismatch
Closed 4 months ago3
Wrong operand order of Zba instructions
Closed 4 months ago2
Behaviour of CRAM not specified for malformed caps
Closed 4 months ago2
CSETMODE encoding is incorrect
Closed 4 months ago1