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rggen / rggen

Code generation tool for control and status registers

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[VHDL] Type mismatch error for an array register with offset address 0x0

taichi-ishitani opened this issue · comments

commented

For this case, need to insert x"00" to the head of the expression.

So the library change works, but the code is no longer synthesizing:
image
With the error:
[Synth 8-10097] type error near i ; current type integer; expected type unresolved_unsigned
Which seems to be related to the below changes:
image

Originally posted by @SzymonHitachi in #196 (comment)

commented

@SzymonHitachi,

I've pushed the fix for this error to the fix_type_mismatch_error.
https://github.com/rggen/rggen-vhdl/tree/fix_type_mismatch_error

Can you check if this error is resolved by this fix?