rejunity / zero-to-asic

My workspace for Zero to ASIC course by Matt Venn

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Workspace for Zero To ASIC course

This repository is my personal workspace for Zero to ASIC course by Matt Venn.

Prerequisites

Simulation

You will need to have libsdl2 and verilator installed.

On Linux:

sudo apt-get install libsdl2-dev libsdl2-image-dev verilator

On OSX using Brew:

brew install sdl2 sdl2_image verilator

NOTE: Theoretically installing verilator through MacPorts should work too, however I ran into the verilator compilation problems this way.

Hardware

Use 1 Bit Squared icebreaker FPGA board with Digilent VGA pmod plugged into pmod1a and pmod1b.

To build binaries and deploy them onto FPGA you will need to have yosys, nextpnr and icestorm installed.

On Linux:

TODO

On OSX (for more details visit Tobias Müller's blog):

brew tap twam/openfgpa
brew install yosys icestorm
brew install nextpnr --without-arch-ecp5

Projects

Projects below are based upon:

Starfield

Run simulation:

make verilator && ./obj_dir/VStarfield

Run on FPGA:

make prog

FlappySpace

Run simulation:

make verilator && ./obj_dir/VFlappySpace

Run on FPGA:

make prog

ASIC

TODO

About

My workspace for Zero to ASIC course by Matt Venn


Languages

Language:Verilog 74.2%Language:C++ 15.2%Language:Makefile 10.6%