rejunity / vga-clock

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

Home Page:https://www.zerotoasiccourse.com/post/vga_clock/

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VGA Clock

simple project to show the time on a 640x480 VGA display.

vga clock

Simulation instructions

Ensure that you have libsdl2-dev and verilator installed.

sudo apt-get install libsdl2-dev libsdl2-image-dev verilator

To run the simulation use the following commands:

cd rtl
make verilator && ./obj_dir/Vvga_clock

fb_verilator

Use the h, m and s keys to increment the hour, minute and second counters respectively.

FPGA Build instructions

It's setup to run on 1 Bit Squared icebreaker with my VGA pmod plugged into pmod1a.

type

make prog

to build & upload to the icebreaker

FPGA utilisation

using logLUTs to record resource usage and max frequency over commits:

luts

ASIC utilisation

https://www.zerotoasiccourse.com/post/vga_clock/

using the Skywater/Google 130nm process and OpenLane

  • copy contents of rtl directory to designs/vga_clock/src/
  • remove digit_tb.v and top_tb.v from designs/vga_clock/src/ (I am working on separating test and rtl)
  • copy asic/config.tcl to designs/vga_clock/
  • inside the docker environment:
    • run ./flow.tcl -init_design_config -design vgaclock
    • run ./flow.tcl -design vga_clock

This results in a routed design that uses 180x180 microns.

See asic/Makefile for some rules that start the docker and show the finished GDS in magic or klayout.

full die

zoom top left

License

This software and hardware is licensed under the Apache License version 2

About

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

https://www.zerotoasiccourse.com/post/vga_clock/


Languages

Language:Verilog 99.0%Language:C++ 0.5%Language:Makefile 0.3%Language:Python 0.1%Language:Tcl 0.0%