Frank.Q.Shan's repositories
chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
hammer
HAMMER: Highly Agile Masks Made Effortlessly from RTL
coursier
Pure Scala Artifact Fetching
tcsh
This is a read-only mirror of the tcsh code repository.
koodo-reader
A modern ebook manager and reader with sync and backup capacities for Windows, macOS, Linux and Web
nerdcommenter
Vim plugin for intensely nerdy commenting powers
Vundle.vim
Vundle, the plug-in manager for Vim
static-analysis
⚙️ A curated list of static analysis (SAST) tools for all programming languages, config files, build tools, and more. The focus is on tools which improve code quality.
jekyll
:globe_with_meridians: Jekyll is a blog-aware static site generator in Ruby
rich
Rich is a Python library for rich text and beautiful formatting in the terminal.
mkdocs
Project documentation with Markdown.
mate-terminal
The MATE Terminal Emulator
iverilog
Icarus Verilog
nvim-metals
A Metals plugin for Neovim
verilator
Verilator open-source SystemVerilog simulator and lint system
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
esp
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
Neovim-from-scratch
📚 A Neovim config designed from scratch to be understandable
docsify
🃏 A magical documentation site generator.
constellation
A Chisel RTL generator for network-on-chip interconnects
rose
Developed at Lawrence Livermore National Laboratory (LLNL), ROSE is an open source compiler infrastructure to build source-to-source program transformation and analysis tools for large-scale C (C89 and C98), C++ (C++98 and C++11), UPC, Fortran (77/95/2003), OpenMP, Java, Python and PHP applications.
klayout
KLayout Main Sources
OpenFASOC
Fully Open Source FASOC generators built on top of OpenROAD