Frank.Q.Shan's repositories
book-searcher-z-lib
Easy and blazing-fast book searcher, create and search your private library. This project does not store and distribute copies of documents, but only provides indexing and searching.
caravel_user_project
https://caravel-user-project.readthedocs.io
chisel-bootcamp
Generator Bootcamp Material: Learn Chisel the Right Way
chisel-template
A template project for beginning new Chisel work
chiselv
A RISC-V Core (RV32I) written in Chisel HDL
conda
OS-agnostic, system-level binary package manager and ecosystem
core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
coremark
CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
ctest_qshan
the folder for the C language study and practice
DL-on-Silicon
research, experimentation and implementation of hardware-agnostic accelerated DL framework
DRAMSys
DRAMSys4.0 a SystemC TLM-2.0 based DRAM simulator.
hello-algo
《Hello 算法》：动画图解、一键运行的数据结构与算法教程。支持 Python, Java, C++, C, C#, JS, Go, Swift, Rust, Ruby, Kotlin, TS, Dart 代码。简体版和繁体版同步更新，English version ongoing
mill
Your shiny new Java/Scala build tool!
openc910
OpenXuantie - OpenC910 Core
riscv-boom
Berkeley Out-of-Order Machine
riscv-mini
Simple RISC-V 3-stage Pipeline in Chisel
rocket-chip
Rocket Chip Generator
SoC-Now-Generator
An open source Mini SoC Generator which will generate SoC based on parameters.
verible
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, and formatter.
vim-markdown
Markdown Vim Mode