poena

Reed_Solomon_Algorithm

Reed Solomon encode and decode algorithm research.

poena.github.io

AMBA_AXI_AHB_APB

AMBA bus lecture material

ARM9-compatible-soft-CPU-core

This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your FPGA design as one submodule, if you master the interface of this .v file. This IP core is very compact. It is one .v file and has only less 1800 lines.

ARM9TDMI

A softcore processor with ARM9TDMI architecture

axi-bfm

git clone of http://code.google.com/p/axi-bfm/

chisel_bootcamp_amm

CRC

Some knowledge about CRC.

nios_case

Some study case of Altera NIOS core

axi2apb

bypass

Bypass domain, CIDR list. Block domain list.

hdl

HDL libraries and projects

Hoge_CIC_Filter

Implement of CIC Filter base on Hogenauer's Paper.

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

iverilog

Icarus Verilog

JESD204B

marss-riscv

Micro-ARchitectural Full System Simulator for RISC-V

matchlib

SystemC/C++ library of commonly-used hardware functions and components for HLS.

NyuziProcessor

GPGPU microprocessor architecture

open_fir

OpenIP

Open source IP collection

opentitan

OpenTitan: Open source silicon root of trust

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

poena

Config files for my GitHub profile.

prbs

Some code for prbs

riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

riscv-list

list famous riscv resource and project

systemc-clang

uvm_axi

uvm AXI BFM(bus functional model)

XilinxUnisimLibrary