openhwgroup / core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

Home Page:https://docs.openhwgroup.org/projects/core-v-verif/en/latest/index.html

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Core Control Interface is not being used to drive cv32e20 primary inputs

MikeOpenHWGroup opened this issue · comments

While looking for something else I noticed that the core_control interface is reporting erroneous inputs to the core:

UVM_INFO /scratch/mike/GitHubRepos/openhwgroup/core-v-verif/cv32e20/dev/cv32e20/tb/uvmt/uvmt_cv32e20_tb_ifs.sv(188) @ 0: reporter [CORE_CNTRL_IF] Quasi-static CORE control inputs:
        pulp_clock_en     = 0
        scan_cg_en        = 0
        boot_addr         = 00000080
        mtvec_addr        = 00000000
        dm_halt_addr      = 1a110800
        dm_exception_addr = 1a111000
        hart_id           = 00000000

Several of these are just plain wrong and at least one (pulp_clock_en) is a hold-over from the CV32E40P. A quick visual inspection reveals that the core control interface is not being used as intended.

There are two paths to resolve this:

  1. Depreciate the use of the core control interface entirely.
  2. Update the core control interface and use it to drive the core control primary inputs to the core.

I favour option 2, but we can discuss at our next verification team meeting.