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losfair / MagiCore

An out-of-order processor that supports multiple instruction sets.

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cpurisc-vriscv

MagiCore

An out-of-order processor that supports multiple instruction sets. My playground for experimenting with new microarchitecture & ISA ideas.

Architecture

ISA support status

  • RISC-V RV32IMAU
  • RISC-V RV64IMAU
  • eBPF
  • MIPS

Performance

Currently MagiCore's frontend (IFetch/Decode) is not superscalar so the performance is limited to <1 IPC. 2.27 CoreMark/MHz, ~106MHz on Artix 7.

About

An out-of-order processor that supports multiple instruction sets.

cpurisc-vriscv

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Language:Scala 97.0%Language:Python 1.0%Language:Rust 0.7%Language:Verilog 0.7%Language:Assembly 0.3%Language:Shell 0.2%Language:Makefile 0.2%