lidapang

rsa

RSA cryptosystem implementation in Verilog

Python-Learning-Resources

svaunit

SVAUnit is an UVM compliant package that simplify the creation of stimuli/checkers for validating SystemVerilog Assertions (SVA)

adxl345

ADXL library to MSP430 launchpad

AMBA_AXI3

System Verilog and Emulation. Written all the five channels.

awesome-buying-a-house

买房必知必会. 买房过程中整理的各种政策信息, 贷款, 公积金, 社保, 房产中介等等相关信息.

backup_20170218_chessgame

**象棋和国际象棋棋盘建模

CCWT

Complex Continuous Wavelet Transformation

ChatBotCourse

自己动手做聊天机器人教程

core-scrapy

python-scrapy demo

dianping_data

python爬虫实战练习手册

doubanfm-py

📻 第三方豆瓣 FM 红心频道播放器。

economic-modeling

gene

数学建模比赛B题。

MachineLearningCourse

机器学习精简入门教程

OGcourse_F16

MACS 40000: Economic Policy Analysis with Overlapping Generations Models

pebslee-pebble

PebSlee is smart alarm and sleep monitoring application working on Pebble smart watches.

proxy_scrapy

proxy_scrapy是一个scrapy搭建的代理模块，主要包括代理抓取、代理测试和使用代理三个模块。包括了对主要的代理网站的抓取和代理稳定性的测试，并整合进scrapy爬虫当中。

PythonSpiderNotes

Python入门网络爬虫之精华版

rt-thread

RT-Thread is an open source real-time operating system for embedded devices from China.

simple-mem-testbench-sv

A simple memory testbench in SystemVerilog

simple_SoC

Small and simple, primitive SoC with GPU, CPU, RAM, GPIO

SmartIMU

Inertial Sensor Development Kit，STM32F412R、MPU9250、LPS22HB

stm32

A lightweight implementation of the ROS middleware on STM32F4Discovery for interfacing embedded and general-purpose software.

stock

雪球股票讨论度与价格走势的关系

tinyos-main

Main development repository for TinyOS (an OS for embedded, wireless devices).

uvm

UVM Examples

uvm_logic

sample uvm complete structure for beginners

wavelib

C Implementation of Wavelet Transform (DWT,SWT and MODWT)

zhihu-python

获取知乎内容信息，包括问题，答案，用户，收藏夹信息