lidapang's repositories
NyuziProcessor
GPGPU microprocessor architecture
Tkinter-By-Example
Learn Tkinter By Example - a free book
Evaluation-in-Literary
文学作品量化评估课程的作业
verilog-ethernet
Verilog Ethernet components
RegGenPerl
Generate Regisiter Verilog/Excel From a Description File
verilog-axis
Verilog AXI stream components
UVM-ERROR-Collections
Collect UVM/Systemverilog errors and solution
verilog-uart
Verilog UART
firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation of RISC-V Systems (Rocket Chip, BOOM) in the Cloud
e200_opensource
The Ultra-Low Power RISC Core
pygubu
A simple GUI designer for the python tkinter module
riscv-formal
RISC-V Formal Verification Framework
sv-assertions-system-tasks
sv assertions : system tasks
verilog-i2c
Verilog I2C
verilog-dsp
Verilog digital signal processing components
automatic-chainsaw
A custom 16-bit computer
hello-comic
收集和程序员有关的漫画
chinese-independent-blog
:cyclone: **独立博客列表
2017_wuhan_house_experience
2017年武汉买房经历
DDR4MemoryController
HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
pytorch-tutorial
PyTorch Tutorial for Deep Learning Researchers
OpenCV-Python-Tutorial
OpenCV-Python-Tutorial-中文版.pdf 源代码
dingdang-robot
叮当是一款可以工作在 Raspberry Pi 上的中文语音对话机器人/智能音箱项目。
MIPS
A classic 5-stage pipeline MIPS 32-bit processor, including a 2-bit branch predictor, a branch prediction buffer and a direct-mapped cache.
abu
阿布量化交易系统(股票，期权，期货，比特币，机器学习) 基于python的开源量化交易，量化投资架构
ISP_UVM
A Framework for Design and Verification of Image Processing Applications using UVM