JOTEGO (jotego)

jotego

Geek Repo

Location:Valencia, Spain

Home Page:https://www.patreon.com/jotego

Twitter:@topapate

Github PK Tool:Github PK Tool


Organizations
MiSTer-devel

JOTEGO's starred repositories

sprig

Useful template functions for Go templates.

GW-BASIC

The original source code of Microsoft GW-BASIC from 1983

Language:C++License:MITStargazers:3199Issues:154Issues:0

gbrom-tutorial

Tutorial for extracting the GameBoy ROM from photographs of the die.

sv2v

SystemVerilog to Verilog conversion

Language:HaskellLicense:BSD-3-ClauseStargazers:512Issues:15Issues:268

Nuked-MD-FPGA

Mega Drive/Genesis core written in Verilog

Language:VerilogLicense:GPL-2.0Stargazers:293Issues:15Issues:10
Language:C++License:BSD-3-ClauseStargazers:247Issues:19Issues:341

jtcores

FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket

Language:VerilogLicense:GPL-3.0Stargazers:205Issues:26Issues:575

Nuked-MD

Cycle accurate Mega Drive emulator

Language:CLicense:GPL-2.0Stargazers:140Issues:15Issues:7

PicoROM

An RP2040-based ROM emulator

Language:C++License:MITStargazers:136Issues:11Issues:4

Microsoft-BASIC-for-6502-Original-Source-Code-1978

This is the original 1978 source code of Microsoft BASIC for 6502 with all original comments, documentation and easter eggs.

License:UnlicenseStargazers:90Issues:9Issues:0

NGDK

SDK for Neo Geo

Language:CLicense:MITStargazers:68Issues:11Issues:0

ReGAL

A set of scripts used to assist reverse engineering of old-school Programmable Array Logic devices.

Language:PythonLicense:MITStargazers:64Issues:10Issues:7

IKAOPM

A BSD-licensed YM2151 cycle-accurate Verilog core based on the die shot from siliconpr0n

Language:VerilogLicense:BSD-2-ClauseStargazers:61Issues:9Issues:6

FocusFileOnSidebar

Sublime Text plugin to open sidebar and focus on the current opened file

Language:PythonLicense:MITStargazers:58Issues:4Issues:24

AMSGateArray

Prototype boards and verilog for development of Xilinx CPLD replacements for the Amstrad 40010 and 40007 gate array chips.

Language:VerilogLicense:GPL-3.0Stargazers:52Issues:10Issues:5

MiSTeX-ports

FPGA board support and core ports for MiSTeX

Language:VerilogLicense:BSD-3-ClauseStargazers:45Issues:8Issues:5

Nuked-SMS-FPGA

Sega Master System emulator written in Verilog

Language:VerilogLicense:GPL-2.0Stargazers:44Issues:8Issues:0

YM2608-LLE

very low-level YM2608B/YM2610/YM2612 emulator

Language:CLicense:GPL-2.0Stargazers:24Issues:7Issues:0

YMF262-LLE

very low-level YMF262 (OPL3) emulator

Language:CLicense:GPL-2.0Stargazers:20Issues:3Issues:0

ASIC_reverse

Gate array reverse engineering

Language:VerilogLicense:BSD-2-ClauseStargazers:17Issues:5Issues:0

YM3812-LLE

very low-level YM3812(OPL2) emulator

Language:CLicense:GPL-2.0Stargazers:16Issues:3Issues:0

Nuked-OPN2-FPGA

YM3438 verilog

Language:VerilogLicense:GPL-2.0Stargazers:13Issues:6Issues:0

Raizing_FPGA

Raizing FPGA Cores for Sorcer Striker, Kingdom Grandprix, Battle Garegga, Batrider and Battle Bakraid

Language:VerilogLicense:GPL-3.0Stargazers:10Issues:0Issues:0

jtkcpu

Verilog module compatible with the 6309-derived Konami CPU

mame

MAME - Multiple Arcade Machine Emulator

Language:C++License:NOASSERTIONStargazers:4Issues:3Issues:0

bag_analog_ec

BAG analog circuits generator repository maintained by Eric Chang.

Language:PythonLicense:BSD-3-ClauseStargazers:3Issues:0Issues:0

ju2v

a test for converting jedutil files to verilog

Language:JavaScriptStargazers:2Issues:1Issues:0

YM2608-LLE

very low-level YM2608B/YM2610/YM2612 emulator

Language:CLicense:GPL-2.0Stargazers:1Issues:0Issues:0