Joris Lee's starred repositories
free-programming-books
:books: Freely available programming books
MoneyPrinterTurbo
利用AI大模型,一键生成高清短视频 Generate short videos with one click using AI LLM.
Practical-Cryptography-for-Developers-Book
Practical Cryptography for Developers: Hashes, MAC, Key Derivation, DHKE, Symmetric and Asymmetric Ciphers, Public Key Cryptosystems, RSA, Elliptic Curves, ECC, secp256k1, ECDH, ECIES, Digital Signatures, ECDSA, EdDSA
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
hadbadge2019_fpgasoc
FPGA SoC code and application example for Hackaday Supercon 2019 badge
F1C100s_projects
Low-level libraries and bare metal projects for allwinner F1C100s SOC
airisc_core_complex
Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
esp32s3_nes_gamer
ESP32_S3老霸王游戏机摆件
gatemate_experiments
Experiments with Cologne Chip's GateMate FPGA architecture
TRNG-with-Ring-Oscillators-in-Verilog
A true random number generator with ring oscillators structure written in VHDL targeting FPGA's.
ARM_M3_design
personal practice
xboot-lvgl
The extensible bootloader for embedded system with application engine, write once, run everywhere.
openFPGALoader
Universal utility for programming FPGA
FPGA-based-True-Random-Number-Generator
True random number generators (TRNGs) play a fundamental role in cryptographic systems. This brief presents a new and efficient method to generate true random numbers on field programmable gate array (FPGA) by utilizing the random jitter of free-running oscillators as a source of randomness.
leosoc-gfmpw-1
A simple dual-core SoC with true random number generators as payload.
Cortex-M3-DesignStart-Eval
Cortex-M3 DesignStart Eval is intended for system Verilog design and simulation of a prototype SoC based on the Cortex-M3 processor.