jaemyungkim's repositories

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A-convolution-kernel-implemented-by-Vivado-HLS

This project implements a convolution kernel based on vivado HLS on zcu104

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TPU-Tensor-Processing-Unit

IC implementation of TPU

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Accelerating-CNN-with-FPGA

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

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AccDNN

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

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FPGA-DCNN-Accelerator

基于HLS的高效深度卷积神经网络FPGA实现方法

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quantized_distillation

Implements quantized distillation. Code for our paper "Model compression via distillation and quantization"

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Embedded-Neural-Network

collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning

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CNN-FPGA

使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用

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PYNQ-Classification

Python on Zynq FPGA for Convolutional Neural Networks

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FPGA-CNN

FPGA implementation of Cellular Neural Network (CNN)

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FPGA-ZynqNet

FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS

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zynqnet

Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"

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NPU-Architecture

CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations

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ez8

The Easy 8-bit Processor

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