Henner Zeller (hzeller)

hzeller

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Location:San Francisco

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Henner Zeller's starred repositories

manim

A community-maintained Python framework for creating mathematical animations.

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FTXUI

:computer: C++ Functional Terminal User Interface. :heart:

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cue

The home of the CUE language! Validate and define text-based and dynamic configuration

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skywater-pdk

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

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ronn

the opposite of roff

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ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

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xls

XLS: Accelerated HW Synthesis

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jubilee

jubilee source files; for the docs, see:

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kicanvas

The KiCAD web viewer

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USB_Laptop_Keyboard_Controller

Details for building a USB keyboard and touchpad controller from an old laptop.

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80x86

80186 compatible SystemVerilog CPU core and FPGA reference design

Language:C++License:GPL-3.0Stargazers:364Issues:26Issues:7

Surelog

SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

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sv-tests

Test suite designed to check compliance with the SystemVerilog standard.

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UHDM

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

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synlig

SystemVerilog support for Yosys

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pico-ice

Raspberry Pi PICO board + Lattice iCE40 FPGA's

Language:HTMLLicense:MITStargazers:129Issues:11Issues:10

vcd

VCD file (Value Change Dump) command line viewer

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iceZ0mb1e

FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC

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otf2bdf

OpenType to BDF Converter (unofficial mirror)

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vectorscope-kicad

Making a complete KiCad Project from the Hackaday Supercon 2023 Vectorscope Badge

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rules_bison

Bazel build rules for GNU Bison

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rules_flex

Bazel build rules for Flex

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rules_m4

Bazel build rules for GNU M4

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chip_art

Convert an image to a GDS format for inclusion in a zerotoasic project

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uxsdcxx

generate C++ reader/writer from XSD schema

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bfon

Bowl Full of Nouns - the Web version

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