hpretl

Inkscape_electric_Symbols

Electrical symbol library for the vector graphics program Inkscape.

optuna

A hyperparameter optimization framework

vsdstdcelldesign

This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.

FABulous

Fabric generator and CAD tools

siliwiz

Silicon Layout Wizard

sscs-ose-chipathon.github.io

gdsiistl

Converts GDSII files to STL files.

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

edalize

An abstraction library for interfacing EDA tools

openEMS-Project

openEMS is a free and open electromagnetic field solver using the FDTD method.

Lighter

An automatic clock gating utility

OpenLane-MPW-CI

riscv-isa-manual

RISC-V Instruction Set Manual

AMS_KGD

A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.

awesome-opensource-hardware-repos

List of awesome open source hardware projects

LunaPnR

LunaPnR is a place and router for integrated circuits

yosys-cmd-ref

Staging repo for Yosys command reference build. The contents of this repository are autogenerated from Yosys source.

capiche

Parasitic capacitance analysis of foundry metal stackups

ADC-survey

ADC Performance Survey 1997-2024 (ISSCC & VLSI Circuit Symposium)

Book-on-MOS-stages

Book repository "Analysis and Design of Elementary MOS Amplifier Stages"

openhab-distro

The binary distribution of openHAB

codon

A high-performance, zero-overhead, extensible Python compiler using LLVM

kvic_336007_ws22

Course material for 336.007 (Prof. Pretl) in WS22 at JKU

PLL_design

PLL Designs on Skywater 130nm MPW

awesome-semiconductor-startups

List of awesome semiconductor startups

sscs-ose-code-a-chip.github.io

IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)

ALIGN-pdk-sky130

sky130_klayout_pdk

Skywaters 130nm Klayout PDK

rggen

Code generation tool for control and status registers

pinout

An open source Python package that generates hardware pinout diagrams as SVG images.