| Block | Partial Product |
|---|---|
| 000 | 0 |
| 001 | 1 * Multiplicand |
| 010 | 1 * Multiplicand |
| 011 | 2 * Multiplicand |
| 100 | -2 * Multiplicand |
| 101 | -1 * Multiplicand |
| 110 | -1 * Multiplicand |
| 111 | 0 |
A Parallel Multiplier Using SystemVerilog HDL
| Block | Partial Product |
|---|---|
| 000 | 0 |
| 001 | 1 * Multiplicand |
| 010 | 1 * Multiplicand |
| 011 | 2 * Multiplicand |
| 100 | -2 * Multiplicand |
| 101 | -1 * Multiplicand |
| 110 | -1 * Multiplicand |
| 111 | 0 |
A Parallel Multiplier Using SystemVerilog HDL
MIT License