Download toolchain and add to path
https://github.com/YosysHQ/oss-cad-suite-build#installation
make -f makefile_ulx3s
You may also need vhd2vl
https://github.com/ldoolitt/vhd2vl
- Primary format decoding
- RGB888
- RGB565
- YUV422 8-bit
- RAW8
- RAW10
- Tests
- D-PHY
- CSI-2
- Decoding
- Error-checking and correction
- Header ECC
- Footer Checksum
- N-lane
- 1 lane
- 2 lane
- 3 lane
- Roadblock: will receive more bytes than the 32-bit buffer
- Consider long packet with 8 bytes
- First 3 from header go from corresponding lanes
- Header byte 4 comes from lane 1, Data byte 1, 2 come from lanes 2 & 3
- Data byte 3, 4, 5 (!) come from lanes 1, 2, & 3
- Thus, you are stuck with extra, on the same clock the user gets the buffer
- Roadblock: will receive more bytes than the 32-bit buffer
- 4 lane
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