Franck Jullien (fjullien)

fjullien

Geek Repo

Location:Nice (France)

Twitter:@fjullien06

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openrisc

Franck Jullien's starred repositories

openFPGALoader

Universal utility for programming FPGA

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hal

HAL – The Hardware Analyzer

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FPGA-USB-Device

An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器,可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备,只需要3个FPGA普通IO,而不需要额外的接口芯片。

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CMSIS-DSP

CMSIS-DSP embedded compute library for Cortex-M and Cortex-A

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satcat5

SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

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symbolator

HDL symbol generator

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FakePGA

Simulating Verilog designs on a microcontroller

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usb_cdc

Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs

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pyvcd

Python package for writing Value Change Dump (VCD) files.

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learn-fpga-amaranth

Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL

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PeakRDL

Control and status register code generator toolchain

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amlib

assorted library of utility cores for amaranth HDL

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pyxsi

Python/C/RTL cosimulation with Xilinx's xsim simulator

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toolchain-installer

Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7

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tool-serial-pcap

Script to capture packets from serial and convert them to pcap format

pin-uart

FPGA board-level debugging and reverse-engineering tool

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kicad-pdk-libs

KiCad symbol library for sky130 and gf180mcu PDKs

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mtkcpu

RISC-V CPU implementation in Amaranth HDL (aka nMigen)

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OpenXC7-LiteX

Container for compiling LiteX HDL FPGA designs using the free OpenXC7 tool chain and GitHub code spaces

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cohdl

A Python to VHDL compiler

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amaranth-to-litex

Use amaranth-to-litex to simply import Amaranth code into a Litex project.

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jtag-mpsse-blaster

Use an MPSSE FTDI device as a JTAG interface in Quartus tools

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migen_uart

It's a UART... written in Migen!

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KiCADBulkHideSilkscreenDesignators

KiCAD pcbnew plugin to hide silkscreen reference designators such as "R4" from one or multiple footprints using a single click

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kicad_7_cli_doc_gen

Quicky python script to generate outputs using the new KiCad 7 CLI

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cohdl_xil

Adds support for Xilinx devices to CoHDL

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migen-litex-intro

Migen and Litex intro to FPGA programming

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qortos

Quite Ok RTOS - tickless, minimal, 500 lines of code, 7 functions

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