zhenwei (dzwduan)

dzwduan

Geek Repo

Company:Institute of Computing Technology, CAS

Home Page:https://dzwduan.github.io/

Github PK Tool:Github PK Tool

zhenwei's repositories

ridecore

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

Language:VerilogLicense:NOASSERTIONStargazers:1Issues:0Issues:0
Language:VerilogStargazers:0Issues:1Issues:0
Language:CLicense:Apache-2.0Stargazers:0Issues:0Issues:0

e203_hbirdv2

The Ultra-Low Power RISC-V Core

Language:VerilogLicense:Apache-2.0Stargazers:0Issues:0Issues:0
Language:SCSSLicense:CC-BY-4.0Stargazers:0Issues:1Issues:0

GLaDOS-checkin

GLaDOS-checkin,通过 github action 进行自动签到,每天延时一天,签到一定次数后奖励会变少。

Stargazers:0Issues:0Issues:0

GPTs

leaked prompts of GPTs

Stargazers:0Issues:0Issues:0
Stargazers:0Issues:1Issues:0

linux-source-code-analyze

Linux源码分析

Stargazers:0Issues:0Issues:0

linux_kernel_wiki

linux内核学习资料:200+经典内核文章,100+内核论文,50+内核项目,500+内核面试题,80+内核视频

Stargazers:0Issues:0Issues:0

ml-rsim

ml-rsim simiulator

Language:CStargazers:0Issues:1Issues:0
Language:C++Stargazers:0Issues:0Issues:0

nanoemu

A super tiny RISC-V emulator that is able to run xv6.

Language:CLicense:MITStargazers:0Issues:0Issues:0
License:NOASSERTIONStargazers:0Issues:0Issues:0

nes_ebook

A mini book on writing NES emulator using rust lang

Language:CSSStargazers:0Issues:0Issues:0

NutShell

RISC-V SoC designed by students in UCAS

Language:ScalaLicense:NOASSERTIONStargazers:0Issues:0Issues:0

oh-my-fish

The Fish Shell Framework

Language:ShellLicense:MITStargazers:0Issues:0Issues:0
Stargazers:0Issues:0Issues:0

printf

Tiny, fast, non-dependent and fully loaded printf implementation for embedded systems. Extensive test suite passing.

License:MITStargazers:0Issues:0Issues:0
License:Apache-2.0Stargazers:0Issues:0Issues:0

rust-based-os-comp2022

[2022开源操作系统训练营](https://learningos.github.io/rust-based-os-comp2022/)

Language:RustLicense:GPL-3.0Stargazers:0Issues:0Issues:0

SDRAM-dependent-image-system

A real-time image acquisition system based on autonomous SDRAM, using automatic read-write FIFO and VGA drivers

Language:VerilogLicense:MITStargazers:0Issues:0Issues:0
Language:CStargazers:0Issues:0Issues:0

simplesim-3.0

SimpleScalar version 3.0 (official repository)

Language:CLicense:NOASSERTIONStargazers:0Issues:0Issues:0
Stargazers:0Issues:0Issues:0
Language:C++Stargazers:0Issues:0Issues:0

xv6-k210

Port XV6 to K210 board!

Language:CLicense:MITStargazers:0Issues:0Issues:0
Language:CLicense:NOASSERTIONStargazers:0Issues:0Issues:0

xv6-riscv

Xv6 for RISC-V

Language:CLicense:NOASSERTIONStargazers:0Issues:0Issues:0
Language:ShellStargazers:0Issues:0Issues:0