zhenwei's repositories
oscpu-framework
A Verilator-based demo.
practice-notes
learning in pcl
nemu-riscv64
The wrapper repo for NJU ICS PA.
RISC-Core-on-FPGA-Arch2021
A course project for Computer Architecture Course at ZJU.
chisel-template
A template project for beginning new Chisel work
kendryte-standalone-sdk
Standalone SDK for kendryte K210
nemu
NJU EMUlator, a full system x86/mips32/riscv32 emulator for teaching
nvboard
NJU Virtual Board
OS-Study-Note
上海交通大学软件学院📕操作系统课程🍃学习笔记🌞现代操作系统原理与实现
os_kernel_lab
OS kernel labs based on Rust Lang & RISC-V 64
riscv-asm-manual
RISC-V Assembly Programmer's Manual
rocket-chip
Rocket Chip Generator
rust
Exercism exercises in Rust.
rust-basics-course
rust-basics course of https://rust.os2edu.cn
rustlings
:crab: Small exercises to get you used to reading and writing Rust code!
techxuexi-js
油猴等插件的 学习强国 js 代码 45分/天
Understanding-Unix-Linux-Programming
<Understanding Unix/Linux Programming> Bruce Molay
XiangShan
Open-source high-performance RISC-V processor
Zhoushan
Open Source Chip Project by University (OSCPU) - Zhoushan Core