cuijialang's repositories
VirtualSatellite4-Core
Virtual Satellite Core - Baseline Framework and IDE Tools
verilog-pcie
Verilog PCI express components
MBSE-ve
Web Client Application designed to enable users to interact with Model Based System Engineering (MBSE) models
corundum
Open source FPGA-based NIC and platform for in-network compute
litepcie
Small footprint and configurable PCIe core
verilog-ethernet
Verilog Ethernet components for FPGA implementation
cocotbext-pcie
PCI express simulation framework for Cocotb
ScopeFun_Firmware
ScopeFun Firmware
cocotbext-axi
AXI interface modules for Cocotb
spi-master
SPI Master for FPGA - VHDL and Verilog
verilog-axi
Verilog AXI components for FPGA implementation
mbse
MBSE BBS
riffa
The RIFFA development repository
JSONinSV
JSON lib in Systemverilog
Yarr-fw
Firmware repository for the PCIe FPGA cards used for the YARR system
bluespecpcie
PCIe library for the Xilinx 7 series FPGAs in the Bluespec language
fpga-drive-aximm-pcie
Example designs for FPGA Drive FMC
serial_port_plotter
Displays real time data from serial port
fpga-source
The source code for the XTRX FPGA image
Artix-Express-35
This is a base design for an Artix-7 35T based FPGA card with PCIE and USB interface. This is meant as an open source, DIY alternative to certain commercial PCIE FPGA development cards.
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
vscode
Visual Studio Code
verible
Verible provides a SystemVerilog parser, style-linter, and formatter.
OpenFPGA
An Open-source FPGA IP Generator
OpenSTA
OpenSTA engine
Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB VPI and Python AST API.