cuijialang's repositories
Artix-Express-35
This is a base design for an Artix-7 35T based FPGA card with PCIE and USB interface. This is meant as an open source, DIY alternative to certain commercial PCIE FPGA development cards.
verilog-pcie
Verilog PCI express components
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
bluespecpcie
PCIe library for the Xilinx 7 series FPGAs in the Bluespec language
cocotbext-axi
AXI interface modules for Cocotb
cocotbext-pcie
PCI express simulation framework for Cocotb
corundum
Open source FPGA-based NIC and platform for in-network compute
fpga-drive-aximm-pcie
Example designs for FPGA Drive FMC
fpga-source
The source code for the XTRX FPGA image
JSONinSV
JSON lib in Systemverilog
litepcie
Small footprint and configurable PCIe core
mbse
MBSE BBS
MBSE-ve
Web Client Application designed to enable users to interact with Model Based System Engineering (MBSE) models
OpenFPGA
An Open-source FPGA IP Generator
OpenSTA
OpenSTA engine
riffa
The RIFFA development repository
ScopeFun_Firmware
ScopeFun Firmware
serial_port_plotter
Displays real time data from serial port
spi-master
SPI Master for FPGA - VHDL and Verilog
Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB VPI and Python AST API.
verible
Verible provides a SystemVerilog parser, style-linter, and formatter.
verilog-axi
Verilog AXI components for FPGA implementation
verilog-ethernet
Verilog Ethernet components for FPGA implementation
VirtualSatellite4-Core
Virtual Satellite Core - Baseline Framework and IDE Tools
vscode
Visual Studio Code
Yarr-fw
Firmware repository for the PCIe FPGA cards used for the YARR system