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cfelton / minnesota

A collection of HDL cores written in MyHDL.

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This project has been merged into rhea.
This project will not be updated or developed further.

The repository will be deleted in the near future.

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A collection of HDL cores written in MyHDL.

License:GNU Lesser General Public License v3.0

Languages

Language:Python 89.3%Language:Verilog 7.2%Language:VHDL 3.4%Language:Shell 0.1%