cfelton

rhea

A collection of MyHDL cores and tools for complex digital circuit design

alt.hdl

Exploration of alternative hardware description languages

test_jpeg

This is a myhdl test environment for the open-cores jpeg_encoder.

minnesota

A collection of HDL cores written in MyHDL.

filter-blocks

A collection of digital hardware filters implemented in myhdl

gizflo

that FPGA flow

myhdl_exercises

MyHDL exercises.

pyFDA

Python Filter Design Analysis Tool

test_gemac

This is a myhdl test environment for the USRP simple_gemac core.

musicbox_simple

This is a simple "musicbox" FPGA (HDL) example inspired by a reddit question.

myhdl

HDMI2USB

Hardware based on a Xilinx Spartan 6 FPGA for capturing HDMI and DVI data.

myhdlpeek

Monitor and display signal waveforms from your MyHDL digital design in a Jupyter notebook.

oh

An Open Hardware Library

serv

SERV - The SErial RISC-V CPU

HDMI-Source-Sink-Modules

Implementation of a HDMI Source/Sink Modules in MyHDL (http://www.myhdl.org/)

JPEGEncV1

myx

FPGA designs for the XESS boards: xula, xula2, CAT, stickit, etc.

notebook_slides

Presentations generated with jupyter notebook

pymtl

Python-based hardware modeling framework

PythonUberHDL

Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL

scikit-kinematics

Python functions for working with 3D kinematics.

SDRAM_Controller

Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)

coveralls-python

Show coverage stats online via coveralls.io

edalize

gsoc

Scripts and ideas related to managing Google Summer of Code for the Python Software Foundation

parallella_elink

Parallella elink DV and alternate implmentation.

scikit-fuzzy

Fuzzy Logic SciKit (Toolkit for SciPy)

site-myhdl

myhdl.org website

site-myhdl-dev

dev.myhdl.org website