Christopher Celio (ccelio)

ccelio

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Company:UC Berkeley

Location:Berkeley, California

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Christopher Celio's repositories

chisel-style-guide

A Style Guide for the Chisel Hardware Construction Language

Speckle

A wrapper for the SPEC CPU2006 benchmark suite.

riscv-boom-doc

Documentation for the BOOM processor

riscv-hpmcounters

A simple utility for doing RISC-V HPM perf monitoring.

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initramfs_linux_flow

This is a hacky tool for building a BBL+Linux+InitRAMFS image for RISC-V.

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riscv-pythia

A RISC-V superscalar front-end simulator.

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coremarkpro-util-make-riscv

The utility files to port CoreMark-Pro to RISC-V.

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TileCodeRayTracer

A simple ray tracer targeting both Tilera's TILE64 and x86 processors.

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fpga-zynq

Support for Rocket Chip on Zynq FPGAs

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isa-analysis-tools

A set of scripts and tools that are helpful for analyzing different ISAs' code behavior.

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qsub-fpga

Infrastructure for managing FPGA cluster via qsub.

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generator-bootcamp

Generator Bootcamp Material: Learn Chisel the Right Way

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RemoteTech

Community developed continuation of Kerbal Space Program's RemoteTech mod.

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riscv-isa-manual

RISC-V Instruction Set Manual

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riscv-isa-sim

Spike, a RISC-V ISA Simulator

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riscv-pk

RISC-V Proxy Kernel

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riscv-torture

RISC-V Torture Test

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rocket

Rocket Microarchitectural Implementation of RISC-V ISA

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rocket-chip

Rocket Chip Generator

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