atul-khobragade / Digital-Logic-Synthesis

To generate an electrical circuit from the given input and output boolean values.

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Digital-Logic-Synthesis-

This is a team project made under Mr. Binod Kumar. Ravi Ramavat, Shivi Mathur and Atul Khobragade worked together on this. The aim of the project is to generate an electrical circuit from the given input and output boolean values.

Input is taken through a csv file and is in a tabular form. Output contains total number of gates and further information about all the gates, such as, whether a gate is used as input or output or neither. Two gates have been used to generate the circuit, AND gate and OR gate.

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To generate an electrical circuit from the given input and output boolean values.


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