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alumpish / DLD-Lab-Projects

Projects of the digital logic design lab (Fall01) at the University of Tehran.

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acceleratordigital-logic-designfpgafunction-generatorwrappersequential-synthesis

DLD-Lab-Projects

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Projects of the digital logic design lab (Fall01) at the University of Tehran.

acceleratordigital-logic-designfpgafunction-generatorwrappersequential-synthesis

License:MIT License

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Language:Verilog 62.2%Language:SystemVerilog 37.8%